In a semiconductor integrated circuit device such as a microcomputer, reduction of external parts is required for downsizing the equipment and reducing cost, and some of the semiconductor integrated circuit devices incorporate a clock generating circuit which generates a clock signal to be supplied to a CPU and peripheral function blocks.
A clock-signal generating circuit of this type is composed of, for example, an oscillator which generates clock signals and two frequency dividers which divide the frequency of the clock signals generated by the oscillator. The frequency dividers are provided in order to increase the options of clock frequencies by the combination of the number of frequency divisions.
Also, the oscillator is composed of, for example, a clock generating unit forming a feedback loop by a reference voltage generating circuit, a constant current generating circuit, a control circuit, a frequency-voltage converting circuit, an integrating circuit, and a voltage control oscillator.
The reference voltage generating circuit generates reference voltages VREFI and VREFC and outputs them to the constant current generating circuit and the integrating circuit. The constant current generating circuit generates a current Iref having no power-supply and temperature dependency. The frequency-voltage converting circuit generates a voltage VSIG based on the current Iref generated by the constant current generating circuit and a control signal generated by a capacitor and a control circuit.
The control circuit generates the control signal based on the clock signal generated by the voltage control oscillator circuit. The frequency-voltage converting circuit generates the voltage based on the current generated by the constant current generating circuit and the control signal generated by the capacitor and the control circuit from the clock signal output from the voltage control oscillator circuit.
The integrating circuit changes a control voltage of the voltage control oscillator so that the reference voltage VREFC generated by the reference voltage generating circuit and the voltage VSIG output from the frequency-voltage converting circuit are equal to each other to adjust the clock cycle to a desired frequency.
As a clock oscillator circuit of this type, the circuit has been known, in which a current control oscillator, a frequency divider, a cycle comparator circuit, an integrator, and a voltage-current converting circuit are connected in series, and an output current of the voltage-current converting circuit of the last stage is fed back to an input side of the current control oscillator of the first stage to make the output of the current control oscillator be an oscillation output, thereby stabilizing the oscillation frequency and improving the oscillation accuracy (see Patent Document 1).